FPGA realization of adaptive coding rate trellis-coded 8PSK system.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/pimrc/ChoiJK03
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FPGA realization of adaptive coding rate trellis-coded 8PSK system.
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FPGA realization of adaptive coding rate trellis-coded 8PSK system.
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