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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/pldi/HsuK03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chung-Hsing_Hsu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ulrich_Kremer>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F781131.781137>
foaf:homepage <https://doi.org/10.1145/781131.781137>
dc:identifier DBLP conf/pldi/HsuK03 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F781131.781137 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
rdfs:label The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chung-Hsing_Hsu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ulrich_Kremer>
swrc:pages 38-48 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/pldi/2003>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/pldi/HsuK03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/pldi/HsuK03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/pldi/pldi2003.html#HsuK03>
rdfs:seeAlso <https://doi.org/10.1145/781131.781137>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/pldi>
dc:subject dynamic voltage scaling, energy savings (xsd:string)
dc:title The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document