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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ppopp/ShanWJO15>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hongzhang_Shan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Leonid_Oliker>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Samuel_Williams_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wibe_de_Jong>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F2712386.2712391>
foaf:homepage <https://doi.org/10.1145/2712386.2712391>
dc:identifier DBLP conf/ppopp/ShanWJO15 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F2712386.2712391 (xsd:string)
dcterms:issued 2015 (xsd:gYear)
rdfs:label Thread-level parallelization and optimization of NWChem for the Intel MIC architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hongzhang_Shan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Leonid_Oliker>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Samuel_Williams_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wibe_de_Jong>
swrc:pages 58-67 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ppopp/2015pmam>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ppopp/ShanWJO15/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ppopp/ShanWJO15>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ppopp/pmam2015.html#ShanWJO15>
rdfs:seeAlso <https://doi.org/10.1145/2712386.2712391>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ppopp>
dc:title Thread-level parallelization and optimization of NWChem for the Intel MIC architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document