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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/qsic/FuDDH08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Junhua_Ding>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xudong_He>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yujian_Fu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhijiang_Dong>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FQSIC.2008.16>
foaf:homepage <https://doi.org/10.1109/QSIC.2008.16>
dc:identifier DBLP conf/qsic/FuDDH08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FQSIC.2008.16 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Mapping Software Architecture Specification to Rewriting Logic (Short Paper). (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Junhua_Ding>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xudong_He>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yujian_Fu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhijiang_Dong>
swrc:pages 376-381 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/qsic/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/qsic/FuDDH08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/qsic/FuDDH08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/qsic/qsic2008.html#FuDDH08>
rdfs:seeAlso <https://doi.org/10.1109/QSIC.2008.16>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/qsic>
dc:subject Software architecture specification, Petri net, rewriting logic, interleaving semantics (xsd:string)
dc:title Mapping Software Architecture Specification to Rewriting Logic (Short Paper). (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document