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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/reconfig/JiaBNGH08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Antonio_N%E2%88%9A%C4%BC%E2%88%9A%C4%AAez>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Cayetano_Guerra>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mario_Hern%E2%88%9A%C2%B0ndez>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tom%E2%88%9A%C2%B0s_Bautista>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zai_Jian_Jia>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FReConFig.2008.33>
foaf:homepage <https://doi.org/10.1109/ReConFig.2008.33>
dc:identifier DBLP conf/reconfig/JiaBNGH08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FReConFig.2008.33 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Design Space Exploration and Performance Analysis for the Modular Design of CVS in a Heterogeneous MPSoC. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Antonio_N%E2%88%9A%C4%BC%E2%88%9A%C4%AAez>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Cayetano_Guerra>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mario_Hern%E2%88%9A%C2%B0ndez>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tom%E2%88%9A%C2%B0s_Bautista>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zai_Jian_Jia>
swrc:pages 193-198 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/ReConFig.2008.33>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/reconfig>
dc:subject Design space exploration, tracking algorithm, platform-based design, heterogeneous MPSoC (xsd:string)
dc:title Design Space Exploration and Performance Analysis for the Modular Design of CVS in a Heterogeneous MPSoC. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document