A Reconfigurable Design Framework for FPGA Adaptive Computing.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/reconfig/LiuLKYJ09
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A Reconfigurable Design Framework for FPGA Adaptive Computing.
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adaptive computing, partial reconfiguration, hardware process scheduling, hardware context switching
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A Reconfigurable Design Framework for FPGA Adaptive Computing.
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