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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Daniel_Ziener>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C4%BErgen_Teich>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jutta_Pirkl>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FRECONFIG.2018.8641692>
foaf:homepage <https://doi.org/10.1109/RECONFIG.2018.8641692>
dc:identifier DBLP conf/reconfig/ZienerPT18 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FRECONFIG.2018.8641692 (xsd:string)
dcterms:issued 2018 (xsd:gYear)
rdfs:label Configuration Tampering of BRAM-based AES Implementations on FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Daniel_Ziener>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C4%BErgen_Teich>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jutta_Pirkl>
swrc:pages 1-7 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/reconfig/2018>
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owl:sameAs <http://dblp.rkbexplorer.com/id/conf/reconfig/ZienerPT18>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/reconfig/reconfig2018.html#ZienerPT18>
rdfs:seeAlso <https://doi.org/10.1109/RECONFIG.2018.8641692>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/reconfig>
dc:title Configuration Tampering of BRAM-based AES Implementations on FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document