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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/recosoc/ArezoomandAFFM17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Arghavan_Asad>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Farah_Mohammadi_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fatemeh_Arezoomand>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mahdi_Fazeli>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mahmood_Fathy>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FReCoSoC.2017.8016154>
foaf:homepage <https://doi.org/10.1109/ReCoSoC.2017.8016154>
dc:identifier DBLP conf/recosoc/ArezoomandAFFM17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FReCoSoC.2017.8016154 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label Energy aware and reliable STT-RAM based cache design for 3D embedded chip-multiprocessors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Arghavan_Asad>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Farah_Mohammadi_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fatemeh_Arezoomand>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mahdi_Fazeli>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mahmood_Fathy>
swrc:pages 1-8 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/recosoc/2017>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/recosoc/ArezoomandAFFM17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/recosoc/ArezoomandAFFM17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/recosoc/recosoc2017.html#ArezoomandAFFM17>
rdfs:seeAlso <https://doi.org/10.1109/ReCoSoC.2017.8016154>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/recosoc>
dc:title Energy aware and reliable STT-RAM based cache design for 3D embedded chip-multiprocessors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document