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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/rseisp/KanasugiM07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Akinori_Kanasugi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mitsuhiro_Matsumoto>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-73451-2%5F62>
foaf:homepage <https://doi.org/10.1007/978-3-540-73451-2_62>
dc:identifier DBLP conf/rseisp/KanasugiM07 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-73451-2%5F62 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
rdfs:label Design and Implementation of Rough Rules Generation from Logical Rules on FPGA Board. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Akinori_Kanasugi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mitsuhiro_Matsumoto>
swrc:pages 594-602 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/rseisp/2007>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/rseisp/KanasugiM07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/rseisp/KanasugiM07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/rseisp/rseisp2007.html#KanasugiM07>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-73451-2_62>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/rseisp>
dc:subject Rough sets; Processor; FPGA (xsd:string)
dc:title Design and Implementation of Rough Rules Generation from Logical Rules on FPGA Board. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document