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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ciprian_Teodorov>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lo%E2%88%9A%C4%AEc_Lagadec>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Th%E2%88%9A%C2%A9otime_Bollengier>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FRSP53691.2021.9806222>
foaf:homepage <https://doi.org/10.1109/RSP53691.2021.9806222>
dc:identifier DBLP conf/rsp/BollengierLT21 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FRSP53691.2021.9806222 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
rdfs:label Prototyping FPGA through overlays. (xsd:string)
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Th%E2%88%9A%C2%A9otime_Bollengier>
swrc:pages 15-21 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/RSP53691.2021.9806222>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/rsp>
dc:title Prototyping FPGA through overlays. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document