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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/rsp/DammanEGNSH16>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Corentin_Damman>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Eric_Noulard>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fabrice_Guet>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gregory_Edison>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C2%A9r%E2%88%9A%C4%ABme_Hugues>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Luca_Santinelli>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F2990299.2990306>
foaf:homepage <https://doi.org/10.1145/2990299.2990306>
dc:identifier DBLP conf/rsp/DammanEGNSH16 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F2990299.2990306 (xsd:string)
dcterms:issued 2016 (xsd:gYear)
rdfs:label Architectural performance analysis of FPGA synthesized LEON processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Corentin_Damman>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Eric_Noulard>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fabrice_Guet>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gregory_Edison>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C2%A9r%E2%88%9A%C4%ABme_Hugues>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Luca_Santinelli>
swrc:pages 33-40 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/rsp/2016>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/rsp/DammanEGNSH16/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/rsp/DammanEGNSH16>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/rsp/rsp2016.html#DammanEGNSH16>
rdfs:seeAlso <https://doi.org/10.1145/2990299.2990306>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/rsp>
dc:title Architectural performance analysis of FPGA synthesized LEON processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document