Hardware-in-the-loop simulation with dynamic partial FPGA reconfiguration applied to computer vision in ROS-based UAV.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/rsp/MoreacABHD20
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/rsp/MoreacABHD20
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Dominique_Heller
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/El_Mehdi_Abdali
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Erwan_Mor%E2%88%9A%C2%A9ac
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Fran%E2%88%9A%C3%9Fois_Berry
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jean-Philippe_Diguet
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FRSP51120.2020.9244863
>
foaf:
homepage
<
https://doi.org/10.1109/RSP51120.2020.9244863
>
dc:
identifier
DBLP conf/rsp/MoreacABHD20
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FRSP51120.2020.9244863
(xsd:string)
dcterms:
issued
2020
(xsd:gYear)
rdfs:
label
Hardware-in-the-loop simulation with dynamic partial FPGA reconfiguration applied to computer vision in ROS-based UAV.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Dominique_Heller
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/El_Mehdi_Abdali
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Erwan_Mor%E2%88%9A%C2%A9ac
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Fran%E2%88%9A%C3%9Fois_Berry
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jean-Philippe_Diguet
>
swrc:
pages
1-7
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/rsp/2020
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/rsp/MoreacABHD20/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/rsp/MoreacABHD20
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/rsp/rsp2020.html#MoreacABHD20
>
rdfs:
seeAlso
<
https://doi.org/10.1109/RSP51120.2020.9244863
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/rsp
>
dc:
title
Hardware-in-the-loop simulation with dynamic partial FPGA reconfiguration applied to computer vision in ROS-based UAV.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document