[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/rtas/SuchaPH04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Premysl_Sucha>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zdenek_Hanz%E2%88%9A%C2%B0lek>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zdenek_Pohl>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FRTTAS.2004.1317287>
foaf:homepage <https://doi.org/10.1109/RTTAS.2004.1317287>
dc:identifier DBLP conf/rtas/SuchaPH04 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FRTTAS.2004.1317287 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Scheduling of Iterative Algorithms on FPGA with Pipelined Arithmetic Unit. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Premysl_Sucha>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zdenek_Hanz%E2%88%9A%C2%B0lek>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zdenek_Pohl>
swrc:pages 404-412 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/rtas/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/rtas/SuchaPH04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/rtas/SuchaPH04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/rtas/rtas2004.html#SuchaPH04>
rdfs:seeAlso <https://doi.org/10.1109/RTTAS.2004.1317287>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/rtas>
dc:subject Cyclic scheduling, monoprocessor, iterative algorithms, integer linear programming, FPGA (xsd:string)
dc:title Scheduling of Iterative Algorithms on FPGA with Pipelined Arithmetic Unit. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document