Integrated delay analysis of regulated ATM switch.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/rtss/NgSZ97
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1997
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Integrated delay analysis of regulated ATM switch.
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asynchronous transfer mode; integrated delay analysis; regulated ATM switch; worst case delay; hard real-time connection; deadline; real-time connection traffic; piecewise linear functions; arrival functions; service functions; performance; priority driven scheduling; FIFO scheduling; simulation experiments; admission probability; cell delay estimation
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Integrated delay analysis of regulated ATM switch.
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