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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/samos/GiraldoWMLA14>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Christopher_Williams_0004>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gerd_Ascheid>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Juan_Fernando_Eusse_Giraldo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Luis_Gabriel_Murillo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rainer_Leupers>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FSAMOS.2014.6893204>
foaf:homepage <https://doi.org/10.1109/SAMOS.2014.6893204>
dc:identifier DBLP conf/samos/GiraldoWMLA14 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FSAMOS.2014.6893204 (xsd:string)
dcterms:issued 2014 (xsd:gYear)
rdfs:label Pre-architectural performance estimation for ASIP design based on abstract processor models. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Christopher_Williams_0004>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gerd_Ascheid>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Juan_Fernando_Eusse_Giraldo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Luis_Gabriel_Murillo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rainer_Leupers>
swrc:pages 133-140 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/samos/2014ic>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/samos/GiraldoWMLA14/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/samos/GiraldoWMLA14>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/samos/samos2014ic.html#GiraldoWMLA14>
rdfs:seeAlso <https://doi.org/10.1109/SAMOS.2014.6893204>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/samos>
dc:title Pre-architectural performance estimation for ASIP design based on abstract processor models. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document