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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/samos/HeinkelMWSHG04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Charles_F._Webb>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Claus_Mayer>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hans_Sahm>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Stefan_Gossens>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ulrich_Heinkel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Werner_Haas_0003>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-27776-7%5F11>
foaf:homepage <https://doi.org/10.1007/978-3-540-27776-7_11>
dc:identifier DBLP conf/samos/HeinkelMWSHG04 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-27776-7%5F11 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label An Optimized Flow for Designing High-Speed, Large-Scale CMOS ASIC SoCs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Charles_F._Webb>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Claus_Mayer>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hans_Sahm>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Stefan_Gossens>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ulrich_Heinkel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Werner_Haas_0003>
swrc:pages 98-107 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/samos/2004>
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rdfs:seeAlso <https://doi.org/10.1007/978-3-540-27776-7_11>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/samos>
dc:title An Optimized Flow for Designing High-Speed, Large-Scale CMOS ASIC SoCs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document