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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/samos/MolnosCHE06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anca_Mariana_Molnos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jos_T._J._van_Eijndhoven>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marc_J._M._Heijligers>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sorin_Dan_Cotofana>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICSAMOS.2006.300826>
foaf:homepage <https://doi.org/10.1109/ICSAMOS.2006.300826>
dc:identifier DBLP conf/samos/MolnosCHE06 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICSAMOS.2006.300826 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Throughput optimization via cache partitioning for embedded multiprocessors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anca_Mariana_Molnos>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jos_T._J._van_Eijndhoven>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Marc_J._M._Heijligers>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sorin_Dan_Cotofana>
swrc:pages 185-192 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/samos/2006ic>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/samos/MolnosCHE06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/samos/MolnosCHE06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/samos/samos2006ic.html#MolnosCHE06>
rdfs:seeAlso <https://doi.org/10.1109/ICSAMOS.2006.300826>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/samos>
dc:title Throughput optimization via cache partitioning for embedded multiprocessors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document