Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/sbcci/HubnerBB04
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2004
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Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration.
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dynamic partial reconfiguration, virtex
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Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration.
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