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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/sbcci/MajekDLB09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/C%E2%88%9A%C2%A9dric_Majek>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Herv%E2%88%9A%C2%A9_Lapuyade>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jean-Baptiste_B%E2%88%9A%C2%A9gueret>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yann_Deval>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1601896.1601953>
foaf:homepage <https://doi.org/10.1145/1601896.1601953>
dc:identifier DBLP conf/sbcci/MajekDLB09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1601896.1601953 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Voltage controlled delay line with phase quadrature outputs for [0.9-4] GHz F-DLL dedicated to zero-IF multi-standard LO. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/C%E2%88%9A%C2%A9dric_Majek>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Herv%E2%88%9A%C2%A9_Lapuyade>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jean-Baptiste_B%E2%88%9A%C2%A9gueret>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yann_Deval>
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/sbcci/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/sbcci/MajekDLB09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/sbcci/MajekDLB09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/sbcci/sbcci2009.html#MajekDLB09>
rdfs:seeAlso <https://doi.org/10.1145/1601896.1601953>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/sbcci>
dc:subject CMOS-SOI, factorial delay locked loop, multi-standard frequency synthesizer, quadrature phase signals, voltage controlled delay element (xsd:string)
dc:title Voltage controlled delay line with phase quadrature outputs for [0.9-4] GHz F-DLL dedicated to zero-IF multi-standard LO. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document