Evaluating the robustness of secure triple track logic through prototyping.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/sbcci/SoaresCLMTR08
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2008
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Evaluating the robustness of secure triple track logic through prototyping.
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CPA, DES, DPA, FPGA, logic style, side-channel attacks
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Evaluating the robustness of secure triple track logic through prototyping.
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