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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/sbcci/SouzaML09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Manoel_Eus%E2%88%9A%C2%A9bio_de_Lima>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Victor_Wanderley_Costa_de_Medeiros>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Viviane_Lucy_Santos_de_Souza>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1601896.1601950>
foaf:homepage <https://doi.org/10.1145/1601896.1601950>
dc:identifier DBLP conf/sbcci/SouzaML09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1601896.1601950 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Architecture for dense matrix multiplication on a high-performance reconfigurable system. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Manoel_Eus%E2%88%9A%C2%A9bio_de_Lima>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Victor_Wanderley_Costa_de_Medeiros>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Viviane_Lucy_Santos_de_Souza>
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/sbcci/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/sbcci/SouzaML09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/sbcci/SouzaML09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/sbcci/sbcci2009.html#SouzaML09>
rdfs:seeAlso <https://doi.org/10.1145/1601896.1601950>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/sbcci>
dc:subject BRAMs (RAM blocks), FPGA (field programmable gate array), MAC (multiplier unit), RASC (reconfigurable application-specific computing), data reuse, matrix multiplication, parallelism, performance (xsd:string)
dc:title Architecture for dense matrix multiplication on a high-performance reconfigurable system. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document