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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marcel_Vin%E2%88%9A%E2%89%A0cius_Medeiros_Oliveira>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-319-29473-5%5F1>
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dc:identifier DOI doi.org%2F10.1007%2F978-3-319-29473-5%5F1 (xsd:string)
dcterms:issued 2015 (xsd:gYear)
rdfs:label Hard-Wiring CSP Hiding: Implementing Channel Abstraction to Generate Verified Concurrent Hardware. (xsd:string)
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swrc:pages 3-18 (xsd:string)
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dc:title Hard-Wiring CSP Hiding: Implementing Channel Abstraction to Generate Verified Concurrent Hardware. (xsd:string)
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rdf:type swrc:InProceedings
rdf:type foaf:Document