Simulating a LAGS processor to consider variable latency on L1 D-Cache.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/scsc/ColmenarGLH10
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/scsc/ColmenarGLH10
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/J._Manuel_Colmenar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_Ignacio_Hidalgo
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Juan_Lanchares
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Oscar_Garnica
>
foaf:
homepage
<
http://portal.acm.org/citation.cfm?id=1999421&CFID=29315481&CFTOKEN=81718596
>
dc:
identifier
DBLP conf/scsc/ColmenarGLH10
(xsd:string)
dcterms:
issued
2010
(xsd:gYear)
rdfs:
label
Simulating a LAGS processor to consider variable latency on L1 D-Cache.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/J._Manuel_Colmenar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_Ignacio_Hidalgo
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Juan_Lanchares
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Oscar_Garnica
>
swrc:
pages
56-63
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/scsc/2010
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/scsc/ColmenarGLH10/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/scsc/ColmenarGLH10
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/scsc/scsc2010.html#ColmenarGLH10
>
rdfs:
seeAlso
<
http://portal.acm.org/citation.cfm?id=1999421&CFID=29315481&CFTOKEN=81718596
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/scsc
>
dc:
title
Simulating a LAGS processor to consider variable latency on L1 D-Cache.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document