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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/sies/GuetSM16>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fabrice_Guet>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C2%A9r%E2%88%9A%C4%ABme_Morio>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Luca_Santinelli>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FSIES.2016.7509420>
foaf:homepage <https://doi.org/10.1109/SIES.2016.7509420>
dc:identifier DBLP conf/sies/GuetSM16 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FSIES.2016.7509420 (xsd:string)
dcterms:issued 2016 (xsd:gYear)
rdfs:label Probabilistic analysis of cache memories and cache memories impacts on multi-core embedded systems. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fabrice_Guet>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C2%A9r%E2%88%9A%C4%ABme_Morio>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Luca_Santinelli>
swrc:pages 131-140 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/sies/2016>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/sies/GuetSM16/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/sies/GuetSM16>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/sies/sies2016.html#GuetSM16>
rdfs:seeAlso <https://doi.org/10.1109/SIES.2016.7509420>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/sies>
dc:title Probabilistic analysis of cache memories and cache memories impacts on multi-core embedded systems. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document