Evaluate the performance changes of processor simulator benchmarks When context switches are incorporated. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/sigada/ShindiC06>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Rajaa_S._Shindi>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Shaun_Cooper>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1145%2F1185642.1185645>
foaf:homepage	<https://doi.org/10.1145/1185642.1185645>
dc:identifier	DBLP conf/sigada/ShindiC06 (xsd:string)
dc:identifier	DOI doi.org%2F10.1145%2F1185642.1185645 (xsd:string)
dcterms:issued	2006 (xsd:gYear)
rdfs:label	Evaluate the performance changes of processor simulator benchmarks When context switches are incorporated. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Rajaa_S._Shindi>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Shaun_Cooper>
swrc:pages	9-14 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/sigada/2006>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/sigada/ShindiC06/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/sigada/ShindiC06>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/sigada/sigada2006.html#ShindiC06>
rdfs:seeAlso	<https://doi.org/10.1145/1185642.1185645>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/sigada>
dc:subject	cache, context switches, cpu, processor simulators, sim-alpha (xsd:string)
dc:title	Evaluate the performance changes of processor simulator benchmarks When context switches are incorporated. (xsd:string)
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rdf:type	swrc:InProceedings
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