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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/sips/OnizawaTH21>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Akira_Tamakoshi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Naoya_Onizawa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Hanyu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FSiPS52927.2021.00047>
foaf:homepage <https://doi.org/10.1109/SiPS52927.2021.00047>
dc:identifier DBLP conf/sips/OnizawaTH21 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FSiPS52927.2021.00047 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
rdfs:label Scalable Hardware Architecture for Invertible Logic with Sparse Hamiltonian Matrices. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Akira_Tamakoshi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Naoya_Onizawa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Hanyu>
swrc:pages 1-6 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/sips/2021>
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owl:sameAs <http://dblp.rkbexplorer.com/id/conf/sips/OnizawaTH21>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/sips/sips2021.html#OnizawaTH21>
rdfs:seeAlso <https://doi.org/10.1109/SiPS52927.2021.00047>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/sips>
dc:title Scalable Hardware Architecture for Invertible Logic with Sparse Hamiltonian Matrices. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document