A low power approach to system level pipelined interconnect design.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/slip/ChandraXS04
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/slip/ChandraXS04
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Anthony_Xu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Herman_Schmit
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Vikas_Chandra
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F966747.966757
>
foaf:
homepage
<
https://doi.org/10.1145/966747.966757
>
dc:
identifier
DBLP conf/slip/ChandraXS04
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F966747.966757
(xsd:string)
dcterms:
issued
2004
(xsd:gYear)
rdfs:
label
A low power approach to system level pipelined interconnect design.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Anthony_Xu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Herman_Schmit
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Vikas_Chandra
>
swrc:
pages
45-52
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/slip/2004
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/slip/ChandraXS04/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/slip/ChandraXS04
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/slip/slip2004.html#ChandraXS04
>
rdfs:
seeAlso
<
https://doi.org/10.1145/966747.966757
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/slip
>
dc:
subject
low power, pipelined interconnect, voltage scaling
(xsd:string)
dc:
title
A low power approach to system level pipelined interconnect design.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document