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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/slip/KwonLCHT05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anantha_P._Chandrakasan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Donald_E._Troxel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Frank_Honor%E2%88%9A%C2%A9>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Payam_Lajevardi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Young-Su_Kwon>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1053355.1053371>
foaf:homepage <https://doi.org/10.1145/1053355.1053371>
dc:identifier DBLP conf/slip/KwonLCHT05 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1053355.1053371 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anantha_P._Chandrakasan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Donald_E._Troxel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Frank_Honor%E2%88%9A%C2%A9>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Payam_Lajevardi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Young-Su_Kwon>
swrc:pages 65-72 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/slip/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/slip/KwonLCHT05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/slip/KwonLCHT05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/slip/slip2005.html#KwonLCHT05>
rdfs:seeAlso <https://doi.org/10.1145/1053355.1053371>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/slip>
dc:subject 3-D FPGA, wire resource prediction (xsd:string)
dc:title A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document