Global interconnect trade-off for technology over memory modules to application level: case study.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/slip/PapanikolaouMCCMRSM03
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2003
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Global interconnect trade-off for technology over memory modules to application level: case study.
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Pareto-optimal energy/delay interconnect exploration, interconnect wire processing, intra/inter-memory interconnect
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Global interconnect trade-off for technology over memory modules to application level: case study.
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