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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/sma/Joan-ArinyoTV09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marta_I._Tarr%E2%88%9A%C2%A9s-Puertas>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Robert_Joan-Arinyo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sebasti%E2%88%9A%E2%80%A0_Vila-Marta>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1629255.1629270>
foaf:homepage <https://doi.org/10.1145/1629255.1629270>
dc:identifier DBLP conf/sma/Joan-ArinyoTV09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1629255.1629270 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Treedecomposition of geometric constraint graphs based on computing graph circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Marta_I._Tarr%E2%88%9A%C2%A9s-Puertas>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Robert_Joan-Arinyo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sebasti%E2%88%9A%E2%80%A0_Vila-Marta>
swrc:pages 113-122 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/sma/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/sma/Joan-ArinyoTV09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/sma/Joan-ArinyoTV09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/sma/spm2009.html#Joan-ArinyoTV09>
rdfs:seeAlso <https://doi.org/10.1145/1629255.1629270>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/sma>
dc:title Treedecomposition of geometric constraint graphs based on computing graph circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document