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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/smacd/VieiraPP0HG022>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/F%E2%88%9A%C2%B0bio_Passos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jorge_Guilherme>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nuno_Horta>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nuno_Louren%E2%88%9A%C3%9Fo_0003>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rafael_Vieira>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ricardo_Martins_0003>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ricardo_Povoa>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FSMACD55068.2022.9816253>
foaf:homepage <https://doi.org/10.1109/SMACD55068.2022.9816253>
dc:identifier DBLP conf/smacd/VieiraPP0HG022 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FSMACD55068.2022.9816253 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
rdfs:label Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/F%E2%88%9A%C2%B0bio_Passos>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jorge_Guilherme>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nuno_Horta>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nuno_Louren%E2%88%9A%C3%9Fo_0003>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rafael_Vieira>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ricardo_Martins_0003>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ricardo_Povoa>
swrc:pages 1-4 (xsd:string)
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/smacd/smacd2022.html#VieiraPP0HG022>
rdfs:seeAlso <https://doi.org/10.1109/SMACD55068.2022.9816253>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/smacd>
dc:title Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document