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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/socc/ChiuK13>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ming-Dou_Ker>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Po-Yen_Chiu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FSOCC.2013.6749656>
foaf:homepage <https://doi.org/10.1109/SOCC.2013.6749656>
dc:identifier DBLP conf/socc/ChiuK13 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FSOCC.2013.6749656 (xsd:string)
dcterms:issued 2013 (xsd:gYear)
rdfs:label Design of 2√óVDD logic gates with only 1√óVDD devices in nanoscale CMOS technology. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ming-Dou_Ker>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Po-Yen_Chiu>
swrc:pages 33-36 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/socc/2013>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/socc/ChiuK13/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/socc/ChiuK13>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/socc/socc2013.html#ChiuK13>
rdfs:seeAlso <https://doi.org/10.1109/SOCC.2013.6749656>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/socc>
dc:title Design of 2√óVDD logic gates with only 1√óVDD devices in nanoscale CMOS technology. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document