Evaluating synchronization techniques for light-weight multithreaded/multicore architectures.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/spaa/SridharanRK07
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2007
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Evaluating synchronization techniques for light-weight multithreaded/multicore architectures.
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full-empty bits, light-weight multithreading, multicore processors, processing-in-memory, scalable lock and barrier synchronization techniques
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Evaluating synchronization techniques for light-weight multithreaded/multicore architectures.
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