Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/ssiri/GuilleySDGM08
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Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs.
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Side-Channel Attacks, Power Constant Logic, WDDL, Positive Dual-Rail with Precharge Logic, FPGA
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Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs.
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