FPGA-Based Fault Injection into Synthesizable Verilog HDL Models.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/ssiri/Shokrolah-ShiraziM08
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FPGA-Based Fault Injection into Synthesizable Verilog HDL Models.
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FPGA-Based Fault Injection into Synthesizable Verilog HDL Models.
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