[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/uksim/ReasAR10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anastacia_B._Alvarez>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Joy_Alinda_P._Reyes>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rosario_M._Reas>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FUKSIM.2010.35>
foaf:homepage <https://doi.org/10.1109/UKSIM.2010.35>
dc:identifier DBLP conf/uksim/ReasAR10 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FUKSIM.2010.35 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label Simulation of Standard Benchmarks in Hardware Implementations of L2 Cache Models in Verilog HDL. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anastacia_B._Alvarez>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Joy_Alinda_P._Reyes>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rosario_M._Reas>
swrc:pages 153-158 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/uksim/2010>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/uksim/ReasAR10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/uksim/ReasAR10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/uksim/uksim2010.html#ReasAR10>
rdfs:seeAlso <https://doi.org/10.1109/UKSIM.2010.35>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/uksim>
dc:title Simulation of Standard Benchmarks in Hardware Implementations of L2 Cache Models in Verilog HDL. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document