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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vdat/KumarC20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nagesh_Ch>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sumit_Kumar>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVDAT50263.2020.9190433>
foaf:homepage <https://doi.org/10.1109/VDAT50263.2020.9190433>
dc:identifier DBLP conf/vdat/KumarC20 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVDAT50263.2020.9190433 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
rdfs:label Design of a Two-Step Low-Power and High-Speed CMOS Flash ADC Architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nagesh_Ch>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sumit_Kumar>
swrc:pages 1-6 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vdat/2020>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vdat/KumarC20/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vdat/KumarC20>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vdat/vdat2020.html#KumarC20>
rdfs:seeAlso <https://doi.org/10.1109/VDAT50263.2020.9190433>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vdat>
dc:title Design of a Two-Step Low-Power and High-Speed CMOS Flash ADC Architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document