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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vdat/SinghKP22>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jai_Gopal_Pandey>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rudresh_Pratap_Singh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shreyam_Kumar>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-031-21514-8%5F47>
foaf:homepage <https://doi.org/10.1007/978-3-031-21514-8_47>
dc:identifier DBLP conf/vdat/SinghKP22 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-031-21514-8%5F47 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
rdfs:label An Overlap-and-Add Based Time Domain Acceleration of CNNs on FPGA-CPU Systems. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jai_Gopal_Pandey>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rudresh_Pratap_Singh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shreyam_Kumar>
swrc:pages 573-583 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vdat/2022>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vdat/SinghKP22/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vdat/SinghKP22>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vdat/vdat2022.html#SinghKP22>
rdfs:seeAlso <https://doi.org/10.1007/978-3-031-21514-8_47>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vdat>
dc:title An Overlap-and-Add Based Time Domain Acceleration of CNNs on FPGA-CPU Systems. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document