High-Performance NoC Simulation Acceleration Framework Employing the Xilinx DSP48E1 Blocks.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vlsi-dat/PrasadPT19
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Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/vlsi-dat/PrasadPT19
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Basavaraj_Talawar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Khyamling_Parane
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Prabhu_B._M._Prasad
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FVLSI-DAT.2019.8741764
>
foaf:
homepage
<
https://doi.org/10.1109/VLSI-DAT.2019.8741764
>
dc:
identifier
DBLP conf/vlsi-dat/PrasadPT19
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FVLSI-DAT.2019.8741764
(xsd:string)
dcterms:
issued
2019
(xsd:gYear)
rdfs:
label
High-Performance NoC Simulation Acceleration Framework Employing the Xilinx DSP48E1 Blocks.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Basavaraj_Talawar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Khyamling_Parane
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Prabhu_B._M._Prasad
>
swrc:
pages
1-4
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/vlsi-dat/2019
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/vlsi-dat/PrasadPT19/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/vlsi-dat/PrasadPT19
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2019.html#PrasadPT19
>
rdfs:
seeAlso
<
https://doi.org/10.1109/VLSI-DAT.2019.8741764
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/vlsi-dat
>
dc:
title
High-Performance NoC Simulation Acceleration Framework Employing the Xilinx DSP48E1 Blocks.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document