[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsi-dat/WuCCWC17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chen_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ching-Yu_Chin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chun-Kai_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hung-Ming_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wan-Ning_Wu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVLSI-DAT.2017.7939659>
foaf:homepage <https://doi.org/10.1109/VLSI-DAT.2017.7939659>
dc:identifier DBLP conf/vlsi-dat/WuCCWC17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVLSI-DAT.2017.7939659 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label An analytical placer for heterogeneous FPGAs via rough-placed packing. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chen_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ching-Yu_Chin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chun-Kai_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hung-Ming_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wan-Ning_Wu>
swrc:pages 1-4 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsi-dat/2017>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsi-dat/WuCCWC17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsi-dat/WuCCWC17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2017.html#WuCCWC17>
rdfs:seeAlso <https://doi.org/10.1109/VLSI-DAT.2017.7939659>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsi-dat>
dc:title An analytical placer for heterogeneous FPGAs via rough-placed packing. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document