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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsi/CadareanuGGG19>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Edouard_Giacomin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ganesh_Gore>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Patsy_Cadareanu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pierre-Emmanuel_Gaillardon>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-030-53273-4%5F14>
foaf:homepage <https://doi.org/10.1007/978-3-030-53273-4_14>
dc:identifier DBLP conf/vlsi/CadareanuGGG19 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-030-53273-4%5F14 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
rdfs:label A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Edouard_Giacomin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ganesh_Gore>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Patsy_Cadareanu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pierre-Emmanuel_Gaillardon>
swrc:pages 307-322 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsi/2019socs>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsi/CadareanuGGG19/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsi/CadareanuGGG19>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2019s.html#CadareanuGGG19>
rdfs:seeAlso <https://doi.org/10.1007/978-3-030-53273-4_14>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsi>
dc:title A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document