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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsi/GiacominBRCG20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Edouard_Giacomin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francky_Catthoor>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C4%BErgen_B%E2%88%9A%E2%88%82mmels>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Julien_Ryckaert>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pierre-Emmanuel_Gaillardon>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVLSI-SOC46417.2020.9344089>
foaf:homepage <https://doi.org/10.1109/VLSI-SOC46417.2020.9344089>
dc:identifier DBLP conf/vlsi/GiacominBRCG20 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVLSI-SOC46417.2020.9344089 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
rdfs:label Layout Considerations of Logic Designs Using an N-layer 3D Nanofabric Process Flow. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Edouard_Giacomin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francky_Catthoor>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C4%BErgen_B%E2%88%9A%E2%88%82mmels>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Julien_Ryckaert>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pierre-Emmanuel_Gaillardon>
swrc:pages 34-39 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsi/2020>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2020.html#GiacominBRCG20>
rdfs:seeAlso <https://doi.org/10.1109/VLSI-SOC46417.2020.9344089>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsi>
dc:title Layout Considerations of Logic Designs Using an N-layer 3D Nanofabric Process Flow. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document