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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsi/OjimaNIA18a>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kunihiro_Asada>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Naoki_Ojima>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Iizuka>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Toru_Nakura>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-030-23425-6%5F1>
foaf:homepage <https://doi.org/10.1007/978-3-030-23425-6_1>
dc:identifier DBLP conf/vlsi/OjimaNIA18a (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-030-23425-6%5F1 (xsd:string)
dcterms:issued 2018 (xsd:gYear)
rdfs:label A 65 nm CMOS Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion with 99.6% Current Efficiency at 10-mA Load. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kunihiro_Asada>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Naoki_Ojima>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Iizuka>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Toru_Nakura>
swrc:pages 1-13 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsi/2018socs>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsi/OjimaNIA18a/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsi/OjimaNIA18a>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2018s.html#OjimaNIA18a>
rdfs:seeAlso <https://doi.org/10.1007/978-3-030-23425-6_1>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsi>
dc:title A 65 nm CMOS Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion with 99.6% Current Efficiency at 10-mA Load. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document