A 4K√ó2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vlsic/JuLWCWHLLCCCWCH14
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/vlsic/JuLWCWHLLCCCWCH14
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Brian_Liu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chang-Lin_Hsieh
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chi-Cheng_Ju
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chia-Yun_Cheng
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chih-Ming_Wang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chun-Chia_Chen
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chung-Hung_Tsai
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hsiu-Yi_Lin
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Huaide_Wang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hue-Min_Lin
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Meng-Jye_Hu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Min-Hao_Chiu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ping_Chao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ryan_Yeh
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sheng-Jen_Wang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ted_Chuang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Tsu-Ming_Liu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yung-Chang_Chang
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FVLSIC.2014.6858389
>
foaf:
homepage
<
https://doi.org/10.1109/VLSIC.2014.6858389
>
dc:
identifier
DBLP conf/vlsic/JuLWCWHLLCCCWCH14
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FVLSIC.2014.6858389
(xsd:string)
dcterms:
issued
2014
(xsd:gYear)
rdfs:
label
A 4K√ó2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Brian_Liu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chang-Lin_Hsieh
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chi-Cheng_Ju
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chia-Yun_Cheng
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chih-Ming_Wang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chun-Chia_Chen
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chung-Hung_Tsai
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hsiu-Yi_Lin
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Huaide_Wang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hue-Min_Lin
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Meng-Jye_Hu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Min-Hao_Chiu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ping_Chao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ryan_Yeh
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Sheng-Jen_Wang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ted_Chuang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Tsu-Ming_Liu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yung-Chang_Chang
>
swrc:
pages
1-2
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/vlsic/2014
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/vlsic/JuLWCWHLLCCCWCH14/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/vlsic/JuLWCWHLLCCCWCH14
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/vlsic/vlsic2014.html#JuLWCWHLLCCCWCH14
>
rdfs:
seeAlso
<
https://doi.org/10.1109/VLSIC.2014.6858389
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/vlsic
>
dc:
title
A 4K√ó2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document