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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsic/MathewSSAKAHCKD16>
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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mark_A._Anders_0001>
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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Steven_Hsu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sudhir_Satpathy>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vikram_B._Suresh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vivek_De>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVLSIC.2016.7573554>
foaf:homepage <https://doi.org/10.1109/VLSIC.2016.7573554>
dc:identifier DBLP conf/vlsic/MathewSSAKAHCKD16 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVLSIC.2016.7573554 (xsd:string)
dcterms:issued 2016 (xsd:gYear)
rdfs:label A 4fJ/bit delay-hardened physically unclonable function circuit with selective bit destabilization in 14nm tri-gate CMOS. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Amit_Agarwal_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gregory_K._Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Himanshu_Kaul>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mark_A._Anders_0001>
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Steven_Hsu>
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vikram_B._Suresh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vivek_De>
swrc:pages 1-2 (xsd:string)
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsic/vlsic2016.html#MathewSSAKAHCKD16>
rdfs:seeAlso <https://doi.org/10.1109/VLSIC.2016.7573554>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsic>
dc:title A 4fJ/bit delay-hardened physically unclonable function circuit with selective bit destabilization in 14nm tri-gate CMOS. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document