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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsic/WeiSSYK15>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Feng_Su>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Guowen_Wei>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pradeep_Shettigar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tom_Kwan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xinyu_Yu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVLSIC.2015.7231295>
foaf:homepage <https://doi.org/10.1109/VLSIC.2015.7231295>
dc:identifier DBLP conf/vlsic/WeiSSYK15 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVLSIC.2015.7231295 (xsd:string)
dcterms:issued 2015 (xsd:gYear)
rdfs:label A 13-ENOB, 5 MHz BW, 3.16 mW multi-bit continuous-time őĒő£ ADC in 28 nm CMOS with excess-loop-delay compensation embedded in SAR quantizer. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Feng_Su>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Guowen_Wei>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pradeep_Shettigar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tom_Kwan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xinyu_Yu>
swrc:pages 292- (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsic/2015>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsic/vlsic2015.html#WeiSSYK15>
rdfs:seeAlso <https://doi.org/10.1109/VLSIC.2015.7231295>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsic>
dc:title A 13-ENOB, 5 MHz BW, 3.16 mW multi-bit continuous-time őĒő£ ADC in 28 nm CMOS with excess-loop-delay compensation embedded in SAR quantizer. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document