A 29% PAE 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated Injection-Locked PLL.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vlsic/ZhangLGWYQWPSO20
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/vlsic/ZhangLGWYQWPSO20
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Atsushi_Shirane
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Bangan_Liu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chun_Wang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jian_Pang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Junjun_Qiu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kenichi_Okada
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kiyoshi_Yanagisawa
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xiaofan_Gu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yun_Wang_0008
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yuncheng_Zhang
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FVLSICircuits18222.2020.9162955
>
foaf:
homepage
<
https://doi.org/10.1109/VLSICircuits18222.2020.9162955
>
dc:
identifier
DBLP conf/vlsic/ZhangLGWYQWPSO20
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FVLSICircuits18222.2020.9162955
(xsd:string)
dcterms:
issued
2020
(xsd:gYear)
rdfs:
label
A 29% PAE 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated Injection-Locked PLL.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Atsushi_Shirane
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Bangan_Liu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chun_Wang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jian_Pang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Junjun_Qiu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kenichi_Okada
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kiyoshi_Yanagisawa
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xiaofan_Gu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yun_Wang_0008
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yuncheng_Zhang
>
swrc:
pages
1-2
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/vlsic/2020
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/vlsic/ZhangLGWYQWPSO20/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/vlsic/ZhangLGWYQWPSO20
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/vlsic/vlsic2020.html#ZhangLGWYQWPSO20
>
rdfs:
seeAlso
<
https://doi.org/10.1109/VLSICircuits18222.2020.9162955
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/vlsic
>
dc:
title
A 29% PAE 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated Injection-Locked PLL.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document