Architectural, System Level and Protocol Level Techniques for Power Optimization for Networked Embedded Systems.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/BeniniSG05
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Architectural, System Level and Protocol Level Techniques for Power Optimization for Networked Embedded Systems.
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Architectural, System Level and Protocol Level Techniques for Power Optimization for Networked Embedded Systems.
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