Logic Verification of Very Large Circuits Using Shark.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/CasasYKJTOS99
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Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/CasasYKJTOS99
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Erik_Seligman
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hannah_Honghua_Yang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jeremy_Casas
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mandar_Joshi
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Manpreet_Khaira
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Steve_W._Otto
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Thomas_Tetzlaff
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FICVD.1999.745167
>
foaf:
homepage
<
https://doi.org/10.1109/ICVD.1999.745167
>
dc:
identifier
DBLP conf/vlsid/CasasYKJTOS99
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FICVD.1999.745167
(xsd:string)
dcterms:
issued
1999
(xsd:gYear)
rdfs:
label
Logic Verification of Very Large Circuits Using Shark.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Erik_Seligman
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hannah_Honghua_Yang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jeremy_Casas
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mandar_Joshi
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Manpreet_Khaira
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Steve_W._Otto
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Thomas_Tetzlaff
>
swrc:
pages
310-317
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/1999
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/vlsid/CasasYKJTOS99/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/vlsid/CasasYKJTOS99
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/vlsid/vlsid1999.html#CasasYKJTOS99
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ICVD.1999.745167
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/vlsid
>
dc:
title
Logic Verification of Very Large Circuits Using Shark.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document