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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/DasB96a>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bhargab_B._Bhattacharya>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Debesh_Kumar_Das>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICVD.1996.489607>
foaf:homepage <https://doi.org/10.1109/ICVD.1996.489607>
dc:identifier DBLP conf/vlsid/DasB96a (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICVD.1996.489607 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label Does retiming affect redundancy in sequential circuits? (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bhargab_B._Bhattacharya>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Debesh_Kumar_Das>
swrc:pages 260-263 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsid/DasB96a/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsid/DasB96a>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsid/vlsid1996.html#DasB96a>
rdfs:seeAlso <https://doi.org/10.1109/ICVD.1996.489607>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:subject timing; redundancy; fault diagnosis; logic testing; sequential circuits; retiming; sequential circuit; logic optimization; operation speed; fault; combinational redundancy; sequential redundancy; test generation; design for testability (xsd:string)
dc:title Does retiming affect redundancy in sequential circuits? (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document